Design-Reuse

Faraday Offers 55nm/ 65nm miniIO with around 40% Area-Saving and Robust ESD Performance

August 18, 2009 -- Faraday Technology Corporation (TAIEX: 3035) today announced the availability of its innovative miniIOâ„¢ at 55nm and 65nm. Compared with general IO pads, Faraday's miniIOâ„¢ ...
Electronic Design

New Networking Chip Adds IO-Link to More Compact Devices

The chip is more compact than other solutions on the market and can be mounted on smaller PCBs slapped on IO-Link devices. With its advanced protection features, the chip can also be used to cut out ...
Design-Reuse

Arasan Chip Systems expands its storage IP Portfolio with ONFI 4.1 PHY and I/O PAD IP seamlessly integrated with its NAND Flash Controller IP for UMC 28nm SoC Designs

Aug 20, 2019, --San Jose, CA -- Arasan today announced the immediate availability of its NAND Flash Controller PHY and I/O Pad IP for UMC 28nm SoC designs compliant to the latest ONFI 4.1 ...