Business Wire

Avery Design Debuts QEMU Virtual Host to SystemVerilog PCIe VIP HW-SW Co-simulation Solution for Pre-silicon System-level Simulation of NVMe SSD and PCIe Designs

TEWKSBURY, Mass.--(BUSINESS WIRE)--Avery Design Systems, leader in functional verification solutions today announced the pre-silicon system simulation solution of NVMe TM SSD and PCIe® designs using ...
Electronic Design

Software Lets SoC Tester Use EDA Design, Simulation Files

The SmarTest PG software for the Agilent 93000 system-on-a-chip (SoC) test system makes the tester "design ready" so it can accept EDA-generated design and simulation files. The software replaces the ...
Embedded

What’s involved in simulation of a complex SoC FPGA like Versal ACAP?

AMD’s Versal adaptive compute acceleration platform (ACAP) is a system-on-chip (SoC) device architecture (see figure 1) includes three groups of engines – scalar, adaptable, and intelligent – plus ...
Seeking Alpha

Cadence Design Systems: The EDA Beat Is On

Cadence is a leader in EDA and is increasingly focused on digital and AI applications and implementations. Excellent design, simulation, and verification functionality, locked-in customers, and ...
Electronic Design

Enhance EV Powertrain Performance with System-Level Simulation Modeling

How in-house-developed and third-party general-purpose simulation tools are limited to a few expert users and aren’t easily shareable. How multiphysics simulation of subsystems can result in an ...
Digi Times

Altair drives multiphysics simulation solutions to accelerate electronics design innovation

The high power consumption of electronic systems, driven by applications in Artificial Intelligence (AI) and High-Performance Computing (HPC), is generating a significant demand to address overheating ...